diff --git a/labor_3/Vorbereitungsaufgaben/Vorbereitungsaufgabe 2/jk-ff/sim/tb_jk-ff.v b/labor_3/Vorbereitungsaufgaben/Vorbereitungsaufgabe 2/jk-ff/sim/tb_jk-ff.v
new file mode 100644
index 0000000..5af059b
--- /dev/null
+++ b/labor_3/Vorbereitungsaufgaben/Vorbereitungsaufgabe 2/jk-ff/sim/tb_jk-ff.v	
@@ -0,0 +1,77 @@
+`timescale 1ns/1ps
+
+module tb_jk-ff;
+reg clk;
+reg res;
+reg en;
+
+integer i;
+
+initial begin
+    clk = 1'b0;
+    res = 1'b0;
+    en = 1'b0;
+    dut_j = 1'b0;
+    dut_k = 1'b0;
+end
+
+always begin
+    #10 clk = ~clk;
+end
+
+reg dut_j;
+reg dut_k;
+
+wire dut_q;
+
+initial begin
+    for (i=0;i<4;i=i+1) begin
+        @ (negedge clk);
+    end
+   
+    res = ~res;
+    #40
+    res = ~res;
+    
+    @ (posedge clk);
+    dut_j = 1'b0;
+    dut_k = 1'b1;
+    @ (posedge clk);
+    dut_j = 1'b1;
+    dut_k = 1'b0;
+    @ (posedge clk);
+    dut_j = 1'b1;
+    dut_k = 1'b1;
+    @ (posedge clk);
+    dut_j = 1'b0;
+    dut_k = 1'b0;
+    
+    en = 1'b1;
+
+    @ (negedge clk);
+    dut_j = 1'b0;
+    dut_k = 1'b1;
+    @ (negedge clk);
+    dut_j = 1'b1;
+    dut_k = 1'b0;
+    @ (negedge clk);
+    dut_j = 1'b1;
+    dut_k = 1'b1;
+    @ (negedge clk);
+    dut_j = 1'b0;
+    dut_k = 1'b0;
+    @ (negedge clk);
+
+
+end
+
+jk-ff dut(
+    .R(res),
+    .CLK(clk),
+    .EN(en),
+    .J(dut_j),
+    .K(dut_k),
+    .Q(dut_q)
+);
+
+endmodule
\ No newline at end of file