From 673abf9c480d5bdc41f165e17a031ac1f6714fa2 Mon Sep 17 00:00:00 2001
From: musabe24 <erdem.musab@outlook.de>
Date: Thu, 29 Feb 2024 12:31:34 +0100
Subject: [PATCH] Grundstruktur des Moore Automaten angelegt.

---
 labor_4/Aufgabe_6-4/src/sr_fsm.v | 87 ++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)
 create mode 100644 labor_4/Aufgabe_6-4/src/sr_fsm.v

diff --git a/labor_4/Aufgabe_6-4/src/sr_fsm.v b/labor_4/Aufgabe_6-4/src/sr_fsm.v
new file mode 100644
index 0000000..82a9882
--- /dev/null
+++ b/labor_4/Aufgabe_6-4/src/sr_fsm.v
@@ -0,0 +1,87 @@
+module sr_fsm (
+    input CLK,
+    input reset,
+    input run,
+    input Sync,
+    input CYCLE_CTR,
+    input MISO,
+    output MOSI,
+    output [7:0] SSn,
+    output ENA
+);
+
+//Definition der States
+parameter STATE_WAIT = 3'h0;
+parameter STATE_INIT = 3'h1;
+parameter STATE_SHIFT = 3'h2;
+parameter STATE_LATCH = 3'h3;
+parameter STATE_CLEAR = 3'h4;
+
+reg [2:0] STATE;
+reg [2:0] NEXT_STATE;
+
+
+//Bei jedem Takt wird der State auf den nächsten State gesetzt, wenn ein Reset anliegt wird der State 'Wait' vorgegeben.
+always @(posedge CLK) begin
+    if(reset) begin
+        STATE = STATE_WAIT;
+    end
+    else begin
+        STATE = NEXT_STATE;
+    end
+end
+    
+//Moore Automat
+always @(STATE) begin
+    case (STATE)
+        STATE_WAIT:
+            if (run == 1'b1) begin
+                NEXT_STATE = STATE_INIT;
+            end
+            else begin
+                NEXT_STATE = STATE_WAIT;
+            end
+
+        STATE_INIT: 
+            if (Sync == 1'b1) begin
+                NEXT_STATE = STATE_SHIFT;
+            end
+            else begin
+                NEXT_STATE = STATE_INIT;
+            end
+
+        STATE_SHIFT:
+            CYCLE_CTR = CYCLE_CTR - 1; //CYCLE_CTR dekrementieren
+            //Schieberegister schieben??
+
+            if (Sync == 1'b1) begin
+                NEXT_STATE = STATE_LATCH;
+            end
+            else begin
+                NEXT_STATE = STATE_SHIFT;
+            end
+
+        STATE_LATCH:
+            if (Sync == 1'b1 && CYCLE_CTR != 6'h0) begin
+                NEXT_STATE = STATE_SHIFT;
+            end
+            else if (Sync == 1'b1 && CYCLE_CTR == 6'h0) begin
+                NEXT_STATE = STATE_CLEAR;
+            end
+            else begin
+                NEXT_STATE = STATE_LATCH;
+            end
+
+        STATE_CLEAR:
+            if (Sync == 1'b1) begin
+                NEXT_STATE = STATE_WAIT;
+            end
+            else begin
+                NEXT_STATE = STATE_CLEAR;
+            end
+
+        default: NEXT_STATE = STATE;
+    endcase
+end
+
+endmodule
\ No newline at end of file