Erste Lösungsvariante ffür 6.3 erstellt
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labor_4/Aufgabe_6-3/quartus/db/logic_util_heursitic.dat
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labor_4/Aufgabe_6-3/quartus/db/logic_util_heursitic.dat
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labor_4/Aufgabe_6-3/quartus/db/prev_cmp_sclk_gen.qmsg
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labor_4/Aufgabe_6-3/quartus/db/prev_cmp_sclk_gen.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1709148267302 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1709148267302 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 28 20:24:27 2024 " "Processing started: Wed Feb 28 20:24:27 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1709148267302 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1709148267302 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off sclk_gen -c sclk_gen " "Command: quartus_map --read_settings_files=on --write_settings_files=off sclk_gen -c sclk_gen" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1709148267302 ""}
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{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1709148267633 ""}
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/users/erdem/desktop/labor_eds/labor_4/aufgabe_6-3/src/sclk_gen.v 1 1 " "Found 1 design units, including 1 entities, in source file /users/erdem/desktop/labor_eds/labor_4/aufgabe_6-3/src/sclk_gen.v" { { "Info" "ISGN_ENTITY_NAME" "1 SCLK_gen " "Found entity 1: SCLK_gen" { } { { "../src/sclk_gen.v" "" { Text "C:/Users/Erdem/Desktop/labor_eds/labor_4/Aufgabe_6-3/src/sclk_gen.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1709148267664 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1709148267664 ""}
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{ "Warning" "WSGN_FILE_IS_MISSING" "../src/d_ff.v " "Can't analyze file -- file ../src/d_ff.v is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Quartus II" 0 -1 1709148267680 ""}
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{ "Error" "ESGN_TOP_ENTITY_IS_MISSING" "sclk_gen " "Top-level design entity \"sclk_gen\" is undefined" { } { } 0 12007 "Top-level design entity \"%1!s!\" is undefined" 0 0 "Quartus II" 0 -1 1709148267711 ""}
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{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 1 2 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was unsuccessful. 1 error, 2 warnings" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "373 " "Peak virtual memory: 373 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1709148267758 ""} { "Error" "EQEXE_END_BANNER_TIME" "Wed Feb 28 20:24:27 2024 " "Processing ended: Wed Feb 28 20:24:27 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1709148267758 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:00 " "Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1709148267758 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1709148267758 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1709148267758 ""}
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{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 3 s 2 s " "Quartus II Full Compilation was unsuccessful. 3 errors, 2 warnings" { } { } 0 293001 "Quartus II %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1709148268356 ""}
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.(0).cnf.cdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.(0).cnf.cdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.(0).cnf.hdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.(0).cnf.hdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm.qmsg
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1709148352099 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1709148352099 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 28 20:25:51 2024 " "Processing started: Wed Feb 28 20:25:51 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1709148352099 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1709148352099 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off sclk_gen -c sclk_gen " "Command: quartus_asm --read_settings_files=off --write_settings_files=off sclk_gen -c sclk_gen" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1709148352099 ""}
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{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1709148352831 ""}
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{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1709148352862 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "379 " "Peak virtual memory: 379 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1709148353177 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Feb 28 20:25:53 2024 " "Processing ended: Wed Feb 28 20:25:53 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1709148353177 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1709148353177 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1709148353177 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1709148353177 ""}
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm.rdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm.rdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm_labs.ddb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.asm_labs.ddb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.atom.rvd
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.atom.rvd
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cbx.xml
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cbx.xml
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<?xml version="1.0" ?>
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<LOG_ROOT>
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<PROJECT NAME="sclk_gen">
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</PROJECT>
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</LOG_ROOT>
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.bpm
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.bpm
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.cdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.cdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.hdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.hdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.idb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.idb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.kpt
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.kpt
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.logdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.logdb
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v1
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IO_RULES,NUM_PINS_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000001,Capacity Checks,Number of pins in an I/O bank should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
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IO_RULES,NUM_CLKS_NOT_EXCEED_CLKS_AVAILABLE,INAPPLICABLE,IO_000002,Capacity Checks,Number of clocks in an I/O bank should not exceed the number of clocks available.,Critical,No Global Signal assignments found.,,I/O,,
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IO_RULES,NUM_VREF_NOT_EXCEED_LOC_AVAILABLE,INAPPLICABLE,IO_000003,Capacity Checks,Number of pins in a Vrefgroup should not exceed the number of locations available.,Critical,No Location assignments found.,,I/O,,
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IO_RULES,IO_BANK_SUPPORT_VCCIO,INAPPLICABLE,IO_000004,Voltage Compatibility Checks,The I/O bank should support the requested VCCIO.,Critical,No IOBANK_VCCIO assignments found.,,I/O,,
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IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VREF,INAPPLICABLE,IO_000005,Voltage Compatibility Checks,The I/O bank should not have competing VREF values.,Critical,No VREF I/O Standard assignments found.,,I/O,,
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IO_RULES,IO_BANK_NOT_HAVE_COMPETING_VCCIO,PASS,IO_000006,Voltage Compatibility Checks,The I/O bank should not have competing VCCIO values.,Critical,0 such failures found.,,I/O,,
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IO_RULES,CHECK_UNAVAILABLE_LOC,INAPPLICABLE,IO_000007,Valid Location Checks,Checks for unavailable locations.,Critical,No Location assignments found.,,I/O,,
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IO_RULES,CHECK_RESERVED_LOC,INAPPLICABLE,IO_000008,Valid Location Checks,Checks for reserved locations.,Critical,No reserved LogicLock region found.,,I/O,,
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IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The location should support the requested I/O standard.,Critical,0 such failures found.,,I/O,,
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IO_RULES,LOC_SUPPORT_IO_DIR,PASS,IO_000010,I/O Properties Checks for One I/O,The location should support the requested I/O direction.,Critical,0 such failures found.,,I/O,,
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IO_RULES,LOC_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000011,I/O Properties Checks for One I/O,The location should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
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IO_RULES,LOC_SUPPORT_OCT_VALUE,PASS,IO_000012,I/O Properties Checks for One I/O,The location should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
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IO_RULES,LOC_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000013,I/O Properties Checks for One I/O,The location should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
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IO_RULES,LOC_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000014,I/O Properties Checks for One I/O,The location should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
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IO_RULES,LOC_SUPPORT_PCI_CLAMP_DIODE,PASS,IO_000015,I/O Properties Checks for One I/O,The location should support the requested PCI Clamp Diode.,Critical,0 such failures found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_CURRENT_STRENGTH,INAPPLICABLE,IO_000018,I/O Properties Checks for One I/O,The I/O standard should support the requested Current Strength.,Critical,No Current Strength assignments found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_OCT_VALUE,PASS,IO_000019,I/O Properties Checks for One I/O,The I/O standard should support the requested On Chip Termination value.,Critical,0 such failures found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_PCI_CLAMP_DIODE,PASS,IO_000020,I/O Properties Checks for One I/O,The I/O standard should support the requested PCI Clamp Diode.,Critical,0 such failures found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_WEAK_PULL_UP_VALUE,INAPPLICABLE,IO_000021,I/O Properties Checks for One I/O,The I/O standard should support the requested Weak Pull Up value.,Critical,No Weak Pull-Up Resistor assignments found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_BUS_HOLD_VALUE,INAPPLICABLE,IO_000022,I/O Properties Checks for One I/O,The I/O standard should support the requested Bus Hold value.,Critical,No Enable Bus-Hold Circuitry assignments found.,,I/O,,
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IO_RULES,IO_STD_SUPPORT_OPEN_DRAIN_VALUE,INAPPLICABLE,IO_000023,I/O Properties Checks for One I/O,The I/O standard should support the Open Drain value.,Critical,No open drain assignments found.,,I/O,,
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IO_RULES,IO_DIR_SUPPORT_OCT_VALUE,PASS,IO_000024,I/O Properties Checks for One I/O,The I/O direction should support the On Chip Termination value.,Critical,0 such failures found.,,I/O,,
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IO_RULES,OCT_AND_CURRENT_STRENGTH_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000026,I/O Properties Checks for One I/O,On Chip Termination and Current Strength should not be used at the same time.,Critical,No Current Strength assignments found.,,I/O,,
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IO_RULES,WEAK_PULL_UP_AND_BUS_HOLD_NOT_USED_SIMULTANEOUSLY,INAPPLICABLE,IO_000027,I/O Properties Checks for One I/O,Weak Pull Up and Bus Hold should not be used at the same time.,Critical,No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found.,,I/O,,
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IO_RULES,IO_STD_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000045,I/O Properties Checks for One I/O,The I/O standard should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
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IO_RULES,LOC_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000046,I/O Properties Checks for One I/O,The location should support the requested Slew Rate value.,Critical,No Slew Rate assignments found.,,I/O,,
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IO_RULES,OCT_SUPPORTS_SLEW_RATE,INAPPLICABLE,IO_000047,I/O Properties Checks for One I/O,On Chip Termination and Slew Rate should not be used at the same time.,Critical,No Slew Rate assignments found.,,I/O,,
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IO_RULES,CURRENT_DENSITY_FOR_CONSECUTIVE_IO_NOT_EXCEED_CURRENT_VALUE,PASS,IO_000033,Electromigration Checks,Current density for consecutive I/Os should not exceed 240mA for row I/Os and 240mA for column I/Os.,Critical,0 such failures found.,,I/O,,
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IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 5 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,,
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IO_RULES,MAX_20_OUTPUTS_ALLOWED_IN_VREFGROUP,INAPPLICABLE,IO_000042,SI Related SSO Limit Checks,No more than 20 outputs are allowed in a VREF group when VREF is being read from.,High,No VREF I/O Standard assignments found.,,I/O,,
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IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,,
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IO_RULES_MATRIX,Pin/Rules,IO_000001;IO_000002;IO_000003;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000009;IO_000010;IO_000011;IO_000012;IO_000013;IO_000014;IO_000015;IO_000018;IO_000019;IO_000020;IO_000021;IO_000022;IO_000023;IO_000024;IO_000026;IO_000027;IO_000045;IO_000046;IO_000047;IO_000033;IO_000034;IO_000042,
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IO_RULES_MATRIX,Total Pass,0;0;0;0;0;7;0;0;7;7;0;1;0;0;6;0;1;6;0;0;0;1;0;0;0;0;0;7;0;0,
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IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
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IO_RULES_MATRIX,Total Inapplicable,7;7;7;7;7;0;7;7;0;0;7;6;7;7;1;7;6;1;7;7;7;6;7;7;7;7;7;0;7;7,
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IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0,
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IO_RULES_MATRIX,SCLK,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,CPHA,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,CPOL,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,CLK,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,RESETn,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,SYNC,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_MATRIX,ENA,Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable,
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IO_RULES_SUMMARY,Total I/O Rules,30,
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IO_RULES_SUMMARY,Number of I/O Rules Passed,9,
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IO_RULES_SUMMARY,Number of I/O Rules Failed,0,
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IO_RULES_SUMMARY,Number of I/O Rules Unchecked,0,
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IO_RULES_SUMMARY,Number of I/O Rules Inapplicable,21,
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.rdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp.rdb
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp_merge.kpt
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.cmp_merge.kpt
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.db_info
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Quartus_Version = Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
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Version_Index = 302049280
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Creation_Time = Wed Feb 28 19:17:51 2024
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.fit.qmsg
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.fit.qmsg
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.hier_info
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labor_4/Aufgabe_6-3/quartus/db/sclk_gen.hier_info
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|sclk_gen
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ENA => T1.IN1
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||||
SYNC => Q1.ENA
|
||||
SYNC => T1.ENA
|
||||
RESETn => Q1.ACLR
|
||||
RESETn => T1.ACLR
|
||||
CPHA => SCLK_1.IN1
|
||||
CPHA => SCLK_0.IN1
|
||||
CLK => Q1.CLK
|
||||
CLK => T1.CLK
|
||||
CPOL => SCLK_3.IN1
|
||||
SCLK <= SCLK_3.DB_MAX_OUTPUT_PORT_TYPE
|
||||
|
||||
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.hif
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.hif
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.ipinfo
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.ipinfo
Normal file
Binary file not shown.
18
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.html
Normal file
18
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.html
Normal file
@@ -0,0 +1,18 @@
|
||||
<TABLE>
|
||||
<TR bgcolor="#C0C0C0">
|
||||
<TH>Hierarchy</TH>
|
||||
<TH>Input</TH>
|
||||
<TH>Constant Input</TH>
|
||||
<TH>Unused Input</TH>
|
||||
<TH>Floating Input</TH>
|
||||
<TH>Output</TH>
|
||||
<TH>Constant Output</TH>
|
||||
<TH>Unused Output</TH>
|
||||
<TH>Floating Output</TH>
|
||||
<TH>Bidir</TH>
|
||||
<TH>Constant Bidir</TH>
|
||||
<TH>Unused Bidir</TH>
|
||||
<TH>Input only Bidir</TH>
|
||||
<TH>Output only Bidir</TH>
|
||||
</TR>
|
||||
</TABLE>
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.rdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.rdb
Normal file
Binary file not shown.
5
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.txt
Normal file
5
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.lpc.txt
Normal file
@@ -0,0 +1,5 @@
|
||||
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|
||||
; Legal Partition Candidates ;
|
||||
+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
|
||||
; Hierarchy ; Input ; Constant Input ; Unused Input ; Floating Input ; Output ; Constant Output ; Unused Output ; Floating Output ; Bidir ; Constant Bidir ; Unused Bidir ; Input only Bidir ; Output only Bidir ;
|
||||
+-----------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.ammdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.ammdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.bpm
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.bpm
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.cdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.cdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.hdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.hdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.kpt
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.kpt
Normal file
Binary file not shown.
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.logdb
Normal file
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.logdb
Normal file
@@ -0,0 +1 @@
|
||||
v1
|
||||
11
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.qmsg
Normal file
11
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.qmsg
Normal file
@@ -0,0 +1,11 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1709148343874 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 32-bit " "Running Quartus II 32-bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1709148343874 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 28 20:25:43 2024 " "Processing started: Wed Feb 28 20:25:43 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1709148343874 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1709148343874 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off sclk_gen -c sclk_gen " "Command: quartus_map --read_settings_files=on --write_settings_files=off sclk_gen -c sclk_gen" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1709148343874 ""}
|
||||
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1709148344189 ""}
|
||||
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/users/erdem/desktop/labor_eds/labor_4/aufgabe_6-3/src/sclk_gen.v 1 1 " "Found 1 design units, including 1 entities, in source file /users/erdem/desktop/labor_eds/labor_4/aufgabe_6-3/src/sclk_gen.v" { { "Info" "ISGN_ENTITY_NAME" "1 sclk_gen " "Found entity 1: sclk_gen" { } { { "../src/sclk_gen.v" "" { Text "C:/Users/Erdem/Desktop/labor_eds/labor_4/Aufgabe_6-3/src/sclk_gen.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1709148344236 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1709148344236 ""}
|
||||
{ "Warning" "WSGN_FILE_IS_MISSING" "../src/d_ff.v " "Can't analyze file -- file ../src/d_ff.v is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Quartus II" 0 -1 1709148344236 ""}
|
||||
{ "Info" "ISGN_START_ELABORATION_TOP" "sclk_gen " "Elaborating entity \"sclk_gen\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1709148344267 ""}
|
||||
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Quartus II" 0 -1 1709148344755 ""}
|
||||
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1709148344961 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1709148344961 ""}
|
||||
{ "Info" "ICUT_CUT_TM_SUMMARY" "10 " "Implemented 10 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "6 " "Implemented 6 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1709148344977 ""} { "Info" "ICUT_CUT_TM_OPINS" "1 " "Implemented 1 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1709148344977 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3 " "Implemented 3 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Quartus II" 0 -1 1709148344977 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1709148344977 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II 32-bit " "Quartus II 32-bit Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "390 " "Peak virtual memory: 390 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1709148344993 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Feb 28 20:25:44 2024 " "Processing ended: Wed Feb 28 20:25:44 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1709148344993 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1709148344993 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1709148344993 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1709148344993 ""}
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.rdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map.rdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.cdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.cdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.hdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.hdb
Normal file
Binary file not shown.
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.logdb
Normal file
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.map_bb.logdb
Normal file
@@ -0,0 +1 @@
|
||||
v1
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.pre_map.hdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.pre_map.hdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.pti_db_list.ddb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.pti_db_list.ddb
Normal file
Binary file not shown.
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.routing.rdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.routing.rdb
Normal file
Binary file not shown.
4
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rpp.qmsg
Normal file
4
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rpp.qmsg
Normal file
@@ -0,0 +1,4 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1709148362091 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Netlist Viewers Preprocess Quartus II 32-bit " "Running Quartus II 32-bit Netlist Viewers Preprocess" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1709148362091 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 28 20:26:01 2024 " "Processing started: Wed Feb 28 20:26:01 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1709148362091 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1709148362091 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_rpp sclk_gen -c sclk_gen --netlist_type=sgate " "Command: quartus_rpp sclk_gen -c sclk_gen --netlist_type=sgate" { } { } 0 0 "Command: %1!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1709148362091 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "Netlist Viewers Preprocess 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Netlist Viewers Preprocess was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "245 " "Peak virtual memory: 245 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1709148362123 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Feb 28 20:26:02 2024 " "Processing ended: Wed Feb 28 20:26:02 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1709148362123 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1709148362123 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1709148362123 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Netlist Viewers Preprocess" 0 -1 1709148362123 ""}
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv.hdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv.hdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv_sg.cdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv_sg.cdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv_sg_swap.cdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.rtlv_sg_swap.cdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgate.rvd
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgate.rvd
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgate_sm.rvd
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgate_sm.rvd
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgdiff.cdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgdiff.cdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgdiff.hdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sgdiff.hdb
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sld_design_entry.sci
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sld_design_entry.sci
Normal file
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sld_design_entry_dsc.sci
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sld_design_entry_dsc.sci
Normal file
Binary file not shown.
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.smart_action.txt
Normal file
1
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.smart_action.txt
Normal file
@@ -0,0 +1 @@
|
||||
DONE
|
||||
41
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sta.qmsg
Normal file
41
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sta.qmsg
Normal file
@@ -0,0 +1,41 @@
|
||||
{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1709148354172 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 32-bit " "Running Quartus II 32-bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354172 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Feb 28 20:25:53 2024 " "Processing started: Wed Feb 28 20:25:53 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1709148354172 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1709148354172 ""}
|
||||
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta sclk_gen -c sclk_gen " "Command: quartus_sta sclk_gen -c sclk_gen" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1709148354172 ""}
|
||||
{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Quartus II" 0 0 1709148354251 ""}
|
||||
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1709148354392 ""}
|
||||
{ "Info" "ICUT_CUT_DEFAULT_OPERATING_CONDITION" "High junction temperature 85 " "High junction temperature operating condition is not set. Assuming a default value of '85'." { } { } 0 21076 "%1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "Quartus II" 0 -1 1709148354424 ""}
|
||||
{ "Info" "ICUT_CUT_DEFAULT_OPERATING_CONDITION" "Low junction temperature 0 " "Low junction temperature operating condition is not set. Assuming a default value of '0'." { } { } 0 21076 "%1!s! operating condition is not set. Assuming a default value of '%2!s!'." 0 0 "Quartus II" 0 -1 1709148354424 ""}
|
||||
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "sclk_gen.sdc " "Synopsys Design Constraints File file not found: 'sclk_gen.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Quartus II" 0 -1 1709148354675 ""}
|
||||
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Quartus II" 0 -1 1709148354675 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLK CLK " "create_clock -period 1.000 -name CLK CLK" { } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354690 ""} } { } 0 332105 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354690 ""}
|
||||
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Quartus II" 0 -1 1709148354769 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354769 ""}
|
||||
{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Quartus II" 0 0 1709148354769 ""}
|
||||
{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Quartus II" 0 0 1709148354785 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 0.092 " "Worst-case setup slack is 0.092" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.092 0.000 CLK " " 0.092 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.359 " "Worst-case hold slack is 0.359" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.359 0.000 CLK " " 0.359 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148354785 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148354785 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148354785 ""}
|
||||
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1709148354800 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1709148354800 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354800 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354800 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -5.000 CLK " " -3.000 -5.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148354800 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148354800 ""}
|
||||
{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Quartus II" 0 0 1709148354816 ""}
|
||||
{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Quartus II" 0 -1 1709148354832 ""}
|
||||
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Quartus II" 0 -1 1709148355036 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 0.186 " "Worst-case setup slack is 0.186" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.186 0.000 CLK " " 0.186 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.318 " "Worst-case hold slack is 0.318" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.318 0.000 CLK " " 0.318 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1709148355067 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -5.000 CLK " " -3.000 -5.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355067 ""}
|
||||
{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Quartus II" 0 0 1709148355099 ""}
|
||||
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 0.506 " "Worst-case setup slack is 0.506" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.506 0.000 CLK " " 0.506 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.193 " "Worst-case hold slack is 0.193" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.193 0.000 CLK " " 0.193 0.000 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355272 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148355287 ""}
|
||||
{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Quartus II" 0 -1 1709148355287 ""}
|
||||
{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Quartus II" 0 -1 1709148355287 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Quartus II" 0 -1 1709148355287 ""}
|
||||
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -3.000 " "Worst-case minimum pulse width slack is -3.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355287 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "========= ============= =====================" { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355287 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.000 -5.052 CLK " " -3.000 -5.052 CLK " { } { } 0 332119 "%1!s!" 0 0 "Quartus II" 0 -1 1709148355287 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Quartus II" 0 -1 1709148355287 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1709148355776 ""}
|
||||
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Quartus II" 0 -1 1709148355776 ""}
|
||||
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 5 s Quartus II 32-bit " "Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "376 " "Peak virtual memory: 376 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1709148355823 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Feb 28 20:25:55 2024 " "Processing ended: Wed Feb 28 20:25:55 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1709148355823 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1709148355823 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1709148355823 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1709148355823 ""}
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sta.rdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.sta.rdb
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.tis_db_list.ddb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.tis_db_list.ddb
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
6
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.tmw_info
Normal file
6
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.tmw_info
Normal file
@@ -0,0 +1,6 @@
|
||||
start_full_compilation:s:00:00:13
|
||||
start_analysis_synthesis:s:00:00:02-start_full_compilation
|
||||
start_analysis_elaboration:s-start_full_compilation
|
||||
start_fitter:s:00:00:06-start_full_compilation
|
||||
start_assembler:s:00:00:02-start_full_compilation
|
||||
start_timing_analyzer:s:00:00:03-start_full_compilation
|
||||
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.vpr.ammdb
Normal file
BIN
labor_4/Aufgabe_6-3/quartus/db/sclk_gen.vpr.ammdb
Normal file
Binary file not shown.
Reference in New Issue
Block a user