Anpassen der .tcl von der Vorlage.

2024-02-22 13:27:32 +01:00
parent 34ac38250d
commit db887941fa
1 changed files with 3 additions and 3 deletions
--- a/labor_3/Übungen/ampel/sim/sim.tcl
+++ b/labor_3/Übungen/ampel/sim/sim.tcl
@@ -5,7 +5,7 @@ file delete -force work

 #Creating the work lib
 vlib work
-vmap ampel "designlib/ampel"
+#vmap ampel "designlib/ampel"
 vmap work work

 #Top level testbench
@@ -13,8 +13,8 @@ vlog tb_ampel.v
 #vlog ../src/ampel.v +define+SIMULATION

 #Simulate
-vsim -c -t ps -L ampel tb_ampel
-#vsim -c -t ps tb_ampel
+#vsim -c -t ps -L ampel tb_ampel
+vsim -c -t ps tb_ampel

 #get wave
 do wave.do