Ressourcen für Labor 4 kopiert

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#************************************************************
# THIS IS A WIZARD-GENERATED FILE.
#
# Version 12.1 Build 243 01/31/2013 Service Pack 1 SJ Web Edition
#
#************************************************************
# Copyright (C) 1991-2012 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# Clock constraints
create_clock -name "CLOCK_50" -period 20.000ns [get_ports {CLOCK_50}] -waveform {0.000 10.000}
# Automatically constrain PLL and other generated clocks
derive_pll_clocks -create_base_clocks
# Automatically calculate clock uncertainty to jitter and other effects.
#derive_clock_uncertainty
# Not supported for family Cyclone II
# tsu/th constraints
# tco constraints
# tpd constraints

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# Quartus II Version 5.1 Internal Build 160 09/19/2005 TO Full Version,
# File: D:\de2_pins\de2_pins.csv,
# Generated on: Wed Sep 28 09:40:34 2005,
# Note: The column header names should not be changed if you wish to import this .csv file into the Quartus II software.,
To,Location
SW[0],PIN_N25
SW[1],PIN_N26
SW[2],PIN_P25
SW[3],PIN_AE14
SW[4],PIN_AF14
SW[5],PIN_AD13
SW[6],PIN_AC13
SW[7],PIN_C13
SW[8],PIN_B13
SW[9],PIN_A13
SW[10],PIN_N1
SW[11],PIN_P1
SW[12],PIN_P2
SW[13],PIN_T7
SW[14],PIN_U3
SW[15],PIN_U4
LEDR[0],PIN_AE23
LEDR[1],PIN_AF23
LEDR[2],PIN_AB21
LEDR[3],PIN_AC22
LEDR[4],PIN_AD22
LEDR[5],PIN_AD23
LEDR[6],PIN_AD21
LEDR[7],PIN_AC21
LEDR[8],PIN_AA14
LEDR[9],PIN_Y13
LEDR[10],PIN_AA13
LEDR[11],PIN_AC14
LEDR[12],PIN_AD15
LEDR[13],PIN_AE15
LEDR[14],PIN_AF13
LEDR[15],PIN_AE13
LEDG[0],PIN_AE22
LEDG[1],PIN_AF22
LEDG[2],PIN_W19
LEDG[3],PIN_V18
LEDG[4],PIN_U18
LEDG[5],PIN_U17
LEDG[6],PIN_AA20
LEDG[7],PIN_Y18
CLOCK_50,PIN_N2
SSn_A[0],PIN_D25
SSn_A[1],PIN_J22
SSn_A[2],PIN_E26
SSn_A[3],PIN_E25
MOSI_A,PIN_F24
SCLK_A,PIN_F23
MISO_A1,PIN_J21
MISO_A2,PIN_J20
SSn_D[0],PIN_F25
SSn_D[1],PIN_F26
SSn_D[2],PIN_N18
SSn_D[3],PIN_P18
MOSI_D,PIN_G23
SCLK_D,PIN_G24
MISO_D,PIN_K22
PWM_OUT_A,PIN_G25
PWM_OUT_B,PIN_H23
PWM_IN_A,PIN_H24
PWM_IN_B,PIN_J23
MOSI_SCOPE,PIN_W23
SCLK_SCOPE,PIN_V23
MISO_SCOPE,PIN_W25
LCD_RW,PIN_K4
LCD_EN,PIN_K3
LCD_RS,PIN_K1
LCD_DATA[0],PIN_J1
LCD_DATA[1],PIN_J2
LCD_DATA[2],PIN_H1
LCD_DATA[3],PIN_H2
LCD_DATA[4],PIN_J4
LCD_DATA[5],PIN_J3
LCD_DATA[6],PIN_H4
LCD_DATA[7],PIN_H3
LCD_ON,PIN_L4
LCD_BLON,PIN_K2
KEY[0],PIN_G26
KEY[1],PIN_N23
KEY[2],PIN_P23
KEY[3],PIN_W26
1 # Quartus II Version 5.1 Internal Build 160 09/19/2005 TO Full Version
2 # File: D:\de2_pins\de2_pins.csv
3 # Generated on: Wed Sep 28 09:40:34 2005
4 # Note: The column header names should not be changed if you wish to import this .csv file into the Quartus II software.
5 To Location
6 SW[0] PIN_N25
7 SW[1] PIN_N26
8 SW[2] PIN_P25
9 SW[3] PIN_AE14
10 SW[4] PIN_AF14
11 SW[5] PIN_AD13
12 SW[6] PIN_AC13
13 SW[7] PIN_C13
14 SW[8] PIN_B13
15 SW[9] PIN_A13
16 SW[10] PIN_N1
17 SW[11] PIN_P1
18 SW[12] PIN_P2
19 SW[13] PIN_T7
20 SW[14] PIN_U3
21 SW[15] PIN_U4
22 LEDR[0] PIN_AE23
23 LEDR[1] PIN_AF23
24 LEDR[2] PIN_AB21
25 LEDR[3] PIN_AC22
26 LEDR[4] PIN_AD22
27 LEDR[5] PIN_AD23
28 LEDR[6] PIN_AD21
29 LEDR[7] PIN_AC21
30 LEDR[8] PIN_AA14
31 LEDR[9] PIN_Y13
32 LEDR[10] PIN_AA13
33 LEDR[11] PIN_AC14
34 LEDR[12] PIN_AD15
35 LEDR[13] PIN_AE15
36 LEDR[14] PIN_AF13
37 LEDR[15] PIN_AE13
38 LEDG[0] PIN_AE22
39 LEDG[1] PIN_AF22
40 LEDG[2] PIN_W19
41 LEDG[3] PIN_V18
42 LEDG[4] PIN_U18
43 LEDG[5] PIN_U17
44 LEDG[6] PIN_AA20
45 LEDG[7] PIN_Y18
46 CLOCK_50 PIN_N2
47 SSn_A[0] PIN_D25
48 SSn_A[1] PIN_J22
49 SSn_A[2] PIN_E26
50 SSn_A[3] PIN_E25
51 MOSI_A PIN_F24
52 SCLK_A PIN_F23
53 MISO_A1 PIN_J21
54 MISO_A2 PIN_J20
55 SSn_D[0] PIN_F25
56 SSn_D[1] PIN_F26
57 SSn_D[2] PIN_N18
58 SSn_D[3] PIN_P18
59 MOSI_D PIN_G23
60 SCLK_D PIN_G24
61 MISO_D PIN_K22
62 PWM_OUT_A PIN_G25
63 PWM_OUT_B PIN_H23
64 PWM_IN_A PIN_H24
65 PWM_IN_B PIN_J23
66 MOSI_SCOPE PIN_W23
67 SCLK_SCOPE PIN_V23
68 MISO_SCOPE PIN_W25
69 LCD_RW PIN_K4
70 LCD_EN PIN_K3
71 LCD_RS PIN_K1
72 LCD_DATA[0] PIN_J1
73 LCD_DATA[1] PIN_J2
74 LCD_DATA[2] PIN_H1
75 LCD_DATA[3] PIN_H2
76 LCD_DATA[4] PIN_J4
77 LCD_DATA[5] PIN_J3
78 LCD_DATA[6] PIN_H4
79 LCD_DATA[7] PIN_H3
80 LCD_ON PIN_L4
81 LCD_BLON PIN_K2
82 KEY[0] PIN_G26
83 KEY[1] PIN_N23
84 KEY[2] PIN_P23
85 KEY[3] PIN_W26